Learning object available

February 18, 2026 | Comments Off on Learning object available

The learning object “Fallos hardware y su influencia en la confiabilidad de redes neuronales” is now available. Authored by J. Gracia-Morán, this learning resource explores hardware faults and their impact on the reliability of neural networks, offering valuable insights for students, researchers, and professionals working in dependable systems, artificial intelligence, fault tolerance and embedded systems. […]

Paper available

January 9, 2026 | Comments Off on Paper available

The paper entitled “Dependability analysis of neural networks implemented in Arduino”, written by Joaquín Gracia-Morán, Juan Carlos Ruiz García, David De Andrés, Luis-J. Saiz-Adalid, Juan C. Baraza,Daniel Gil and Pedro Gil Vicente, and published in proceedings of the Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2025) is available to download from here. Abstract […]

Paper accepted at EDCC 2026

December 10, 2025 | Comments Off on Paper accepted at EDCC 2026

The paper entitled “CNN Robustness through Quantisation in Edge Devices: An Incomplete Solution” authored by Juan-Carlos Baraza-Calvo, David de Andrés and Juan Carlos Ruiz García has been accepted at EDCC 2026. Abstract: Deep learning has become a cornerstone for image analysis and object recognition. However, deploying Convolutional Neural Networks (CNNs) on embedded and IoT devices […]

Presentation at WIICT 2025

July 11, 2025 | Comments Off on Presentation at WIICT 2025

Joaquín Gracia-Morán has presented the work entitled “Dependability analysis of neural networksimplemented in Arduino” at WIICT 2025. Abstract The use of neural networks has expanded to environments as diverse as medical systems, industrial devices and space systems. In these cases, it is essential to balance performance, power consumption, and silicon area. Furthermore, in critical environments, […]

Attendance at Jornadas SARTECO

July 1, 2025 | Comments Off on Attendance at Jornadas SARTECO

Researchers from the Fault-Tolerant Systems Group participed in the last Josnadas SARTECO, that were held in Sevilla. During the event, the group’s researchers presented several oral communications focusing on advances from the national project the DEFADAS (Dependable-enough FPGA-Accelerated DNNs for Automotive Systems) and the project from the Universitat Politècnica de València (Convocatoria A+D, Proyectos de […]

Paper accepted at SAFECOMP 2025

June 2, 2025 | Comments Off on Paper accepted at SAFECOMP 2025

The paper entitled “Can C-Based ECC Models Leverage High-Level Synthesis? Evaluating Description Variants for Efficient Circuit Implementations”, authored by Joaquín Gracia-Morán, Juan-Carlos Ruiz, David de Andrés and Luis-J. Saiz-Adalid has been accepted at SAFECOMP 2025. Abstract: Error-Correcting Codes (ECCs) are essential for achieving fault tolerance in hardware accelerators deployed in safety-critical applications, such as those […]

Papers accepted at Jornadas SARTECO 2025

May 5, 2025 | Comments Off on Papers accepted at Jornadas SARTECO 2025

Different papers authored by the GSTF’s members has been accepted at Jornadas SARTECO 2025, that will be held in Sevilla (Spain) next June. Title: Análisis de la confiabilidad de una red neuronal implementada en Arduino con formato BF16Authors: Joaquín Gracia-Morán, David de Andrés, Luis-J. Saiz-Adalid, Juan Carlos Ruiz, J.-Carlos Baraza-Calvo, Daniel Gil-Tomás, Pedro J. Gil-VicenteAbstract: […]

Attendance at the EDCC

April 27, 2025 | Comments Off on Attendance at the EDCC

The ITACA Institute has echoed the attendance of GSTF researchers at EDCC 2025. The complete information can be seen here.

Poster award at EDCC 2025

April 15, 2025 | Comments Off on Poster award at EDCC 2025

The poster entitled “Towards a novel 8-bit floating point format to increase robustness in CNNs”, written by Luis J. Saiz-Adalid, has been awarded as Distinguished Poster at EDCC 2025. Congratulations!!

Participation in the EDCC 2025

April 14, 2025 | Comments Off on Participation in the EDCC 2025

Several members of the group have traveled to Lisbon to participate in EDCC 2025, where they have presented the future work we are doing.

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